Combinational logic on gate signals. More...

#include <gate_logic.hpp>

Public Member Functions
void	prepare (double)
void	set_op (GateOp op)
GateOp	op () const
void	apply_reset_edge ()
void	reset ()
bool	process (bool a, bool b) const
bool	process (const bool *gates, int count) const
	N-input form.
SampleType	process_levels (SampleType a, SampleType b) const
	Level-domain form: thresholds both inputs and returns 0 or 1.

Static Public Member Functions
static constexpr int	latency_samples ()

Static Public Attributes
static constexpr double	kLevelThreshold = kTriggerHighThreshold
	Level above which an input counts as high in the level-domain overload.

Detailed Description

template<typename SampleType = float>
class pulp::signal::GateLogicT< SampleType >

Combinational logic on gate signals.

Genuinely stateless — a transport reset is a no-op, because there is nothing to reset. That is why the level-domain overload compares against a plain threshold rather than running each input through a TriggerDetectT: hysteresis is memory, and memory in a combinational block would make its output depend on the order inputs happened to arrive in.

The N-input form applies the base operation across all inputs and inverts for the negated variants — nand is not (a and b and c…), xnor is the complement of parity — rather than folding the two-input operation pairwise, which for the negated ops would not be associative and would make the answer depend on argument order.

USE. and two clocks for an only-on-coincidence gate; xor two divided clocks for a composite rhythm busier than either; or to merge two gate streams. Three ClockDividerT (kit) taps at ÷2/÷3/÷5 through a tree of these is a dense polymetric pattern from one master clock and zero randomness.

RT contract: pure arithmetic, no state, no allocation.